NV 30

[Ryon]

I found some new info on the NV 30 thought i might share with everyone.
First of all the nv30 is going to support ddrII which will make it even that much faster. The core will be .13 micron (the high end nv30 only). It will be relased concurrently with directX 9 and of course will be 8x agp. what can i say but I WANT ONE!!!!!

[vee_ess]

DDR II, is it a new memory architecture, QDR (quadruple data rate), or something else?

This new generation is supposed to make many changes in the way cards will work and change the industry.

[Ryon]

DDR-II is expected to offer a minimum bandwidth of 400 Mbits/second per pin based on 100-MHz signaling. With chip frequencies rising, a 150-MHz core could produce bandwidth as high as 600 Mbits/s per pin. The interface is expected to run at 1.8 volts, down from the 2.5 V of DDR-I, and it will demand new packaging at both the chip and module levels, as well as a new data-capture and synchronization scheme.

The first spin of DDR technology doubled the performance of standard synchronous DRAM by pumping data bits on both the rising and falling edge of the clock cycle. DDRII doubles the total bandwidth again by increasing the data fetch from 2 to 4 bits. As a result, the same 100-MHz SDRAM core that became a 200-Mbit/s-per-pin DDR device will jump to 400 Mbits/s per pin with DDR-II.

[vee_ess]

So, in effect, it is QDR?

[Ryon]

Not really, they way its doubling is not the same as the sd to ddr change. I dont know what you mean by "in effect" but a qdr would not be feasable. DDR 1 works by making the info sent 2 times as often. SD will only send data on one end of the clock cycle and DDR does it on the rise and fall. to me it seams there cant be 2 rises and 2 falls in one cycle so thus "qdr" just wouldent work out.
Im not sure what your question was but im hoping i answered it.

[vee_ess]

Well, with the Pentium 4's they have quadruple data rate, so a 100 mhz clock frequency run it at 400 mbps. I'm not sure what that means for how they came by it, but it sounded like what DDR II was, so I'm not really sure. I don't think they pumped 2 of each, so I imagine it might be the same thing that DDR II is.