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Intel's New Family of 800 MHz FSB Processors

Review by Michael Tran on 6.05.03
Managing Editor: Harry Lam
CPU Provided by Intel



This page basically goes through the "features" of Intel's P4 family.  If you're not interested in this, you can skip directly to the next page.

Back of the Intel P4 3.0


Front Side Bus 800MHz FSB (Quad-Pumped 200MHz FSB (4 x 200 MHz) )
Available Speeds 3.00 GHz, 2.80C GHz, 2.60C GHz, 2.40C GHz
Supported Chipsets Intel's 875 (Canterwood), 865G, and 865PE (Springdale)
Hyperthreading Technology Yes
Based on Intel's NetBurst Microarchitechure Hyper-pipelined technology
Rapid Execution Engine
Execution trace cache
Advanced transfer cache
Advanced dynamic execution
Enhanced floating point/multimedia
Streaming SIMD 2

Intel's NetBurst Microarchitecture:

This is basically a set of advances in processor technology that Intel has implemented into the P4 family of CPUs.

Hyper-pipelined technology:

Hyper-pipelined technology differs from similar technology found in the PIII by doubling the pipeline depth as compared to the PIII.  In one specific pipeline, the branch prediction/recovery pipeline, the PIII has ten stages in which data is processed whereas the P4 offers an expanded twenty-stage pipeline.  This basically allows the processor to function more efficiently.

Rapid Execution Engine:

The Rapid Execution Engine allows the ALU and AGU sections of the processor to run at double the core processor frequency, allowing the CPU to execute basic integer operations at double the speed of the core possessor.

Execution trace cache:

The execution trace cache stores up to 12k of decoded micro-operations, which allows the processor to save time by not having to decode repeated operations.  This basically allows the processor to constantly be supplied with data, decreasing the probability that the processor has to wait for the decoder units.

Advanced transfer cache:

The advanced transfer cache is a fancy name for an upgrade of the L2 cache.  The advanced transfer cache is on-die and offers lower latency, full core speed data transfer, and a wider path for data to transfer to the processor.

Advanced dynamic execution:

This feature basically allows the processor to predict future operations more accurately.  This potentially can improve the processing speed of a processor, but this can also have a negative effect if the processor predicts incorrectly.

Streaming SIMD 2:

SIMD means Single Instruction Multiple Data, and basically is an additional instruction set for the Pentium4 (in addition to the basic x86 and MMX instruction sets).  SIMD allows data to be analyzed from more than one data set, but what SIMD 2 (SIMD double precision) offers is the improvement of more demanding instructions such as 3D rendering, multiple instruction sets, and complex applications.  This feature enhanced the SIMD to 128-bits allowing improvements in speech, imaging, photo processing, encrypting, and others.

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