Soyo Dragon KT333 Ultra
Reviewed by
Akimoto, 05.11.02
Provided by:
Soyo USA
Introduction
Soyo really hit it big with the first line of Dragon boards, first based on the KT266 chipset and then based on the KT266A revision. The combination of a unique color scheme, high quality integrated peripherals, and topped by first class performance helped the Dragon see a slew of webzine awards. With the release of the KT333, Soyo took its time in releasing the new Dragon, and it arrived a little later than such motherboards as the EPoX or the Gigabyte. However, as the Guinness slogan reminds us, good things come to those who wait, so lets see what the new Ultra revision to the Dragon line has to offer us...
Specifications & What's in the
Box
- Chipset:
Via KT333CE/8233A for the Socket
A
- Processor:
AMD Athlon, Athlon XP, and Duron processors
- Memory
3 DIMM sockets for 3 modules of 184-pin PC1600/2100/2700 DDR memory
- Expansion
1x master AGP Pro slot
5x 32-bit bus master PCI slots
- Enhanced I/O
Floppy disk controller
2x EIDE channels with
33/66/100/133 support for up to 4 devices
Standard/ECP/EEP parallel port
2x 16550 compatible serial ports
IrDA compatible infrared port
8x USB connectors: 4x USB 1.1, 4x USB
2.0
PS/2 Mouse and Keyboard connectors
- IDE RAID Function
Includes HighPoint HPT372 chipset with IDE and RAID 0, 1, 0+1 support
- C-Media Onboard Audio
Includes the C-Media CMI8738-MX chipset. Supports 4/5/5.1 channel speakers
- On-Board LAN
Includes Realtek RTL8100B 10/100 Mbps base-T LAN chipset
- Smart Card Reader
Compliant with PC/SC Workgroup standards
- In the box
1x Soyo SY-KT333 Dragon Ultra Mainboard
1x User manual
1x Installation CD-ROM
1x Soyo Bonus Pack CD-ROM
3x IDE Ribbon Cables
1x FDD Cable
1x Audio Expansion Card
1x Flat cable for Audio Card
1x Heat Sink Compound
- Features
- Jumperless design allows for CPU FSB/Multiplier/vCore to be adjusted via
BIOS, along with DIMM, AGP, and PCI manipulation.
- Supports Wake On Lan (WOL)
functionality
- Suspend to Disk functionality
- Fail-Safe startup - CPU fan header
must receive signal before POST
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