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AMD Phenom 9600 Black Edition
Synthetic Benchmarks
We include these benchmarks as a baseline against which you can compare your system using identical software. It should be noted that even identical systems and components may perform differently though your results should be within the range of what you see here given the same setup.
Sisoft Sandra Arithmetic
Processor |
ALU |
FPU |
| AMD Phenom 9600 (2.3 GHz) Quad Core | 41105 | 34396 |
| Intel QX6700 ( 2.667GHz) Quad Core | 44839 | 19901 |
| Intel E6550 (2.33GHz) Dual Core | 24890 | 8721 |
What we see here is that while the QX6700 does outperform the Phenom 9600 it does so by operating at more than 300MHz faster. On a clock per clock basis the Phenom manages to outpace the Intel equivilant.
Sisoft Sandra Memory
Processor |
Integer |
Floating Point |
| AMD Phenom 9600 (2.3 GHz) Quad Core | 4896 | 4829 |
| Intel QX6700 ( 2.667GHz) Quad Core | 5889 | 5901 |
| Intel E6550 (2.33GHz) Dual Core | 6420 | 6445 |
CineBench2003
Processor |
Single CPU |
Dual/Quad |
| AMD Phenom 9600 (2.3 GHz) Quad Core | 62.2 Seconds | 19.4 Seconds |
| Intel QX6700 ( 2.667GHz) Quad Core | 54.5 Seconds | 16.6 Seconds |
| Intel E6550 (2.33GHz) Dual Core | 70.1 Seconds | 39.3 Seconds |
POV Ray 3.7 Beta 25
Processor |
Single CPU |
Dual/Quad |
| AMD Phenom 9600 (2.3 GHz) Quad Core | 386.75 Pixels Per Second | 1454.63 Pixels Per Second |
| Intel QX6700 ( 2.667GHz) Quad Core | 520.25 Pixels Per Second | 2110.32 Pixels Per Second |
| Intel E6550 (2.33GHz) Dual Core | 480.54 Pixels Per Second | 910.60 Pixels Per Second |
The TLB Effect
AMD designed the Phenom with a TLB or Translation Lookaside Buffer which is a is a CPU cache (L3 in the case of the Phenom) that is used by memory management hardware to improve the speed of virtual address translation. Basically its a cache of addresses that is used by the system to speed up the accessing of information. It has become well known the the Phenom and Barcelona processors had some early issues with the integrated TLB. AMD's early fix was to disable the TLB which led to a significant decrease in performance as the TLB greatly increases workflow of information within a system. IF the TLB is disabled the CPU must look to the Page Table which is much slower in comparison. All of this boils down to memory access time and the potential to speed up or delay sending data through your RAM and the system.
We ran a few of the synthetic benchmarks with the TLB enabled and then disabled and found mixed results. We utilized the AMD Overdrive utility to disable the "fix" released for the TLB Erratum problem. Many of our CPU centric synthetic benchmarks showed little to no benefit from enabling the TLB while memory intensive applications showed marked improvements of up to 110%. Compression, decompression, encoding, and memory read/writes showed between 25 and 110% improvements while 3D applications, rendering, and computational showed between 3 -10% increases. AMD states this issue is only exposed on rare occasions and in high usage of all 4 cores and is referred to officially as erratum number 298. It is likely that AMD is telling the truth with regards to the TLB issue and that the likelyhood of a user actually seeing system instability due to TLB is very rare. The released fix disables some of the logic in the CPU that leads to this issue but it does not completely disable the L3. The average difference in real world applications averaged out to 14% and in synthetic application to be 22%. As we don't expect that most users spend the majority of their time benchmarking their systems instead of using them the actual impact is quite small. The difference in real world terms comes down to a matter of seconds if that. Most users are unlikely to even notice the difference.
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