The RAM
RAM overclocking is possibly the least understood of all the overclocking options, yet once the basic concepts are understood it is not that difficult. Increasing the FSB to overclock the CPU will also cause the RAM to communicate more quickly, and if the RAM is not capable of reaching the same frequencies as the FSB, optimal performance will not be achieved and there is a chance instabilities will occur. This can be counteracted easily by using a memory divider to allow the RAM to run at a more stable speed.
Memory dividers are a very useful tool in overclocking, as they allow the FSB to run at much faster frequencies than the memory may be capable of. A simple example would be a memory divider of 4:5 with an FSB of 1000 MHz. This would allow the FSB to run at 1000 MHz, while the memory remained at a more achievable 800 MHz (1000 x 4/5). This allows higher FSB speeds while maintaining memory stability. Overclocking the RAM itself is much like overclocking the CPU in that you simply increase the frequency at which the memory runs and increase voltage if stability issues are encountered.
It is very important to understand that RAM is labeled as DDR for a reason, like AMD CPU’s, it performs two operations per cycle, so RAM that is labeled as DDR3 1600 has an actual frequency of 800 MHz.
Memory Timings
Possibly the least understood aspect of overclocking is how and when to change memory timings. The four main memory timings are commonly represented in a system’s BIOS by the acronyms tCL-tRCD-tRP-tRAS. In their respective order, these acronyms represent Column Address Strobe-Row Access Strobe-RAS Precharge-minimum RAS active time. Many motherboards now support the modification of additional RAM timing settings, but these are generally unused as they do not have nearly the impact as the main four. When displayed in product specifications or online while researching timings, these acronyms are replaced by groups of 4 numbers, such as 9-9-9-24 (tCL-tRCD-tRP-tRAS). Generally speaking, lower timings leads to faster performance, more instability and lower possible frequencies, while higher timings create less performance, more stability and higher possible frequencies. As a general rule, timings should not go below 7, as this can lead to errors and loss of data. Thankfully, the timings are unique in that changing them offers very few physical consequences to the system, and will usually only lead to software instability. Even with few real consequences to improperly setting memory timings, a good rule to follow is to always have the tRAS be (tRCD + CAS + 5) until system stability is verified, then attempt to raise or lower tRAS while leaving the other settings the same.
Using this rule, if a timing of 8-8-8-21 proves stable, a set of 8-8-8-20 may be achievable as well.
If memory timings are going to be adjusted, the order that they will impact performance from greatest to least is:
1) tRCD 2) tRP 3) CAS
This means that if timings are being lowered, first tRCD, then tRP and finally CAS should be adjusted. The opposite is true if timings are being raised.


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